TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 229

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

SCLK cycle
SCLK low level pulse width
SCLK high level pulse width
4.4
SCLK cycle
Output data →
Rising edge or falling edge*
of SCLK
SCLK rising edge or falling
edge* → Output data hold
SCLK rising edge or falling
edge* → Input data hold
SCLK rising edge or falling
edge* → Effective data input
SCLK cycle (Programmable)
Output data →
SCLK rising edge
SCLK rising edge →
Output data hold
SCLK rising edge →
Input data hold
SCLK rising edge →
Effective data input
Note: System clock is fs, or input clock to prescaler is divisor clock of fs.
*)
Note: System clock is fs, or input clock to prescaler is divisor clock of fs.
Note: System clock is fs, or input clock to prescaler is divisor clock of fs.
SCLK output mode (Only rising edge is used) or
SCLK input mode (SCLK rising edge mode)
SCLK Input mode (SCLK falling edge mode)
Output data TXD
Input data RXD
Parameter
Parameter
Parameter
Serial Channel Timing
(1) I/O interface mode
(2) UART mode (SCLK0, SCLK1 external input)
The rising edge is used in SCLK rising mode.
The falling edge is used SCLK falling mode.
a.
b.
SCLK
SCLK
SCLK input mode
SCLK output mode
t SCY
t SCYL
t SCYH
Symbol
t SCY
t OSS
t OHS
t HSR
t SRD
t
t
t
t
t
Symbol
Symbol
SCY
OSS
OHS
HSR
SRD
t SCY /2 − 5x − 50
t
SCY
4x + 20
5x − 100
2X − 80
2x + 5
2x + 5
Min
Min
Min
16X
150
16x
− 2X −
0
0
Variable
Variable
Variable
t
OSS
0
93CS20-227
t SCY − 5x − 100
t
SCY
Max
Valid
t
8192X
SCY
Max
Max
0
150
t
− 2X −
OHS
t
SRD
122 µ s
488 µs 250 ms
427 µs
Min
32.768 MHz
91.5 µ s
32.768 MHz
488 µ s
152 µ s
60 µs
6 µ s
6 µ s
32.768 kHz
Min
Min
0
0
(Note)
(Note)
(Note)
1
Valid
428 µs
336 µ s
1
Max
Max
Max
t
HSR
Min
Min
1.28
1.28
970
12.5 MHz
190
300
12.5 MHz
80
0
0
Min
12.5 MHz
340
165
165
2
655.36
Max
Max
Valid
970
780
Max
2
Min
Min
550
100
150
0.8
0.8
20
Min
0
0
20 MHz
20 MHz
220
105
105
20 MHz
TMP93CS20
409.6
3
2004-02-10
Max
Max
550
Max
450
Valid
3
Unit
Unit
Unit
µ s
ns
ns
ns
ns
µ s
ns
ns
ns
ns
ns
ns
ns