TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 163

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

(12) Generating timing
Transmission
interrupt timing
Receiving
interrupt timing
Interrupt timing
Framing error timing Center of stop bit
Parity error timing
Overrun error timing Center of last bit (Bit8)
Interrupt timing
Note:
1)
2)
UART mode
I/O interface
In 9-bit and 8-bit + party modes, interrupts coincide with the ninth bit pulse.
Thus, when servicing the interrupt, it is necessary to wait for a 1-bit period (to allow the stop bit to be
transferred) to allow checking for a framing error.
Receiving
Transmitting
Mode
Mode
SCLK output mode
SCLK input mode
SCLK output mode
SCLK input mode
Center of last bit (Bit8)
Just before stop bit is
transmitted.
9 Bits (Note)
9 Bits
−
Immediately after rise of last SCLK signal.
(See figure 3.9.22)
Immediately after rise of last SCLK signal (Rising mode), or
immediately after fall in falling mode. (See figure 3.9.23)
Timing used to transfer received data to data receive buffer
2 (SC0BUF) (that is, immediately after last SCLK).
(See figure 3.9.24)
Timing used to transfer received data to data receive buffer
2 (SC0BUF) (that is, immediately after last SCLK).
(See figure 3.9.25)
93CS20-161
Center of last bit (Parity
bit)
Center of stop bit
Center of last bit
(Parity bit)
Center of last bit
(Parity bit)
8 Bits + Parity (Note)
8 Bits + parity
←
Center of stop bit
Center of stop bit
Center of stop bit
Center of stop bit
8 Bits, 7 Bits + parity,
8 Bits, 7 Bits + parity,
7 Bits
7 Bits
←
TMP93CS20
2004-02-10