TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 63

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

P3
(0007H)
P3CR
(000AH)
P3FC
(000BH)
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Note 1: Read-modify-write is prohibited for registers P3CR and P3FC.
Note 2: When port P3 is used in the input mode, the P3 register controls the built-in pull-up resistor.
Note 3: The INT0 to INT4 pins can be also used to release the standby state. When these pins are not used for
Read-modify-write is prohibited in the input mode or the I/O mode, as it may affect the states of the pull-up
resistor.
releasing the standby, port P3 maintains the port function by setting the P3 register to 0 during standby.
0: Port
1: INT4
P37C
P37
I4IE
7
7
7
1
0
0
0
1
0
1
0
1
0
1
0
1
0: Port
1: INT3
P36C
INT0 Input disable (Only P33)
INT0 Input enable
INT1 Input disable
INT1 Input enable
INT2 Input disable
INT2 Input enable
INT3 Input disable
INT3 Input enable
INT4 Input disable
INT4 Input enable
P36
I3IE
6
6
6
1
0
0
Figure 3.5.9 Registers for Port 3
0: Port
1: INT2
Input mode (pulled up)
Port 3 Function Register
Port 3 Control Register
0: Input 1: Output
P35C
P35
I2IE
5
5
5
1
0
0
Port 3 Register
93CS20-61
W
0: Port
1: INT1
P34C
P34
I1IE
4
1
4
4
0
0
R/W
W
0: Port
1: INT0
P33C
P33
I0IE
3
1
3
0
3
0
0: Port
1:
P32C
P32F
HWR
<P30F>
<P31F>
P32
2
1
2
0
2
0
P30 (
P31 (
HWR
P3FC<P32F>
P3CR<P32C>
0
1
0
1
<P30>
<P31>
I/O setting
RD
0: Port
1:
WR
0
1
setting
P31F
) function setting
WR
P31
) function setting
1
1
1
1
0
Output mode
0 output
access
0 output
Always
output
(for pseudo
SRAM)
Input
Output
WR
output only for external
0
0: Port
1:
0
RD
P30F
RD
P30
TMP93CS20
1
1
0
0
0
1
0
2004-02-10
1 output
1 output
only for
external
access
RD
1
output
1