TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 261

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
(2) Points to note
a.
b.
c.
d.
e.
f.
g.
h.
i.
j.
k.
TEST1, TEST2 pin
HALT mode (IDLE1)
the prescaler before the HALT instruction is executed.
Warm-up counter
an external oscillator. As a result, a time equivalent warm-up time elapses from input of
the release request to output of the system clock.
Programmable pull-up resistor
ports are used as input ports. When the ports are used as outputs, they cannot be turned
ON/OFF by the program.
Consequently read-modify-write instructions are prohibited.
Watchdog timer
watch dog timer will not be used, disable it.
AD converter
reduce power consumption. When standby mode is used, disable the resistor using the
program before the HALT instruction is executed.
CPU (Micro DMA)
registers in the CPU (Like the transfer source address register (DMASn)).
POP SR instruction
HALT mode (STOP)
GND.
Supply of reference voltage to V1 pin
EA
Fix these pins to VCC unless changing voltage.
Connect the TEST1 pin with the TEST2 pin. Do not connect to any other pins.
When IDLE1 mode (Oscillator operation only) is used, set TRUN<PRRUN> to 0 to stop
The warm-up counter operates when STOP mode is released even if the system is using
The programmable pull up resistor can be turned ON/OFF by the program when the
The data registers (e.g., P6) are used for the pull-up/down resistors ON/OFF.
The watchdog timer starts operation immediately after the reset is released. When the
The string resistor between the VREFH and VREFL pins can be cut by a program to
Only the “LDC cr, r” and “LDC r, cr” instructions can be used to access the control
Please execute POP SR instruction during DI condition.
If you can enter STOP mode on either of the following conditions, fix port 8 to VCC or
Do not supply the reference voltage to V1 pin during STOP mode.
When setting the pin control to “I/O off” at STOP mode.
When setting the pin control to “keep the condition prior to halt” at STOP mode
and also when port 8 is input mode.
93CS20-259
TMP93CS20
2004-02-10

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