TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 31

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
(Align)
Input:
Output: Output state
Output*: Open-drain output state. Input gate in operation. Set output to low or attach pull up on pin that the
Invalid: Input gate in operation.
High-Z: Output is at high impedance.
PU:
PU*:
▲:
Note: Port registers are used for controlling programmable pull up/pull down. If a pin can be used for an
output function (e.g., TO3) and the output function is specified, whether pull up or pull down is
selected depends on the output function data. If a pin can be used for an input function, whether pull
up is selected depends on the port register setting value only.
Input gate in operation. Fix input voltage to low or high so that the input state pin stays constant.
input gate stays constant.
Programmable pull-up pin. When a pull-up resistor is not set, fix the pin to avoid through current
because the input gate always operates.
Programmable pull-up pin in input gate disable state. No through current flows even if the pin is set
to high impedance.
When a HALT instruction is executed and CPU stops at the address of the port register, an input
gate operates. Fix the pin to avoid through current, and change the program. In all other cases,
input is not accepted.
93CS20-29
TMP93CS20
2004-02-10

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