TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 214

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
CHPCR
(0095H)
−V
−V
V
V
LCD3
LCD3
LCD3
LCD3
f
V
F
0
0
LCD3
: Frame frequency
Bit symbol
Read/Write
After reset
Function
: LCD drive voltage
(1) LCD drive
Data 1
Figure 3.14.4 LCD Drive Pulse (Electrical difference between COM and SEG)
1/f
F
(a) 1/4 duty (1/3 bias) drive
The driving method is initialized according to the LCD to be used in the initial
program.
(c) 1/2 duty (1/3 bias) drive
1/f
Data 1
There are four types to drive the LCD, which are selected by the LCDCR<DUTY1:0>.
LCD
display
0:
1:
F
Blanking
Display
enable
EDSP
7
0
Data 0
Figure 3.14.3 LCD Boosting Circuit Control Register
R/W
Boosting
operation
0:
1:
EDCP
Disable
Enable
6
0
LCD Boosting Circuit Control Register
Data 0
5
93CS20-212
4
−V
−V
V
V
LCD3
LCD3
LCD3
LCD3
0
0
Boosting operation enable/disable
LCD display control
3
0
1
0
1
Disable
Enable
Blanking
Display enable
1/f
(b) 1/3 duty (1/3 bias) drive
1/f
Data 1
F
F
Data 1
2
(d) Static drive
1
Data 0
TMP93CS20
0
2004-02-10
Data 0

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