TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 236

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

Symbol
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
PA
Note 1: When P30 pin is defined as
Note 2: Port 86, 87 are also used as XT1, XT2. Therefore these pins are open drain output type.
Read/Write
(1) I/O port
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Port A
Name Address
P30 to 0 outputs the
accessed. If the output latch register P30 remains 1, the
external address is accessed.
R/W: Either read or write is possible
R: Only read is possible
W: Only write is possible
Prohibit RMW: Prohibit read-modify-write.
Prohibit RMW*:Read-modify-write is prohibited when controlling the PU resistors.
(Prohibit
(Prohibit
(Prohibit
(Prohibit
RMW*)
RMW*)
RMW*)
RMW*)
0CH
0DH
1EH
00H
01H
06H
07H
12H
13H
18H
19H
(Prohibit RES/SET/TSET/CHG/STCF/ANDCF/ORCF/XORCF instruction)
PA7
P07
P17
P27
P37
P47
P57
P67
P77
P87
P97
7
0
1
1
1
1
1
1
0
1
Output mode
RD
strobe from P30 pin for PSRAM, even when the internal address is
PA6
P06
P16
P26
P36
P46
P56
P66
P76
P86
P96
RD
6
0
1
1
1
1
1
1
0
1
signal output mode (P30F = 1), clearing the output latch register
93CS20-234
PA5
P05
P15
P25
P35
P45
P55
P65
P75
P85
P95
5
0
1
1
1
1
1
1
0
1
Input mode
PA4
P04
P14
P24
P34
P44
P54
P64
P74
P84
P94
4
0
1
1
1
1
1
1
0
1
Output mode
Output mode
Input mode
Input mode
Input mode
Input mode
Input mode
Input mode
Input mode
Undefined
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
PA3
P03
P13
P23
P33
P43
P53
P63
P73
P83
P93
3
0
1
1
1
1
1
1
0
1
RD
Input mode
strobe is output only when the
PA2
P02
P12
P22
P32
P42
P52
P62
P72
P82
P92
2
0
1
1
1
1
1
1
0
1
PA1
P01
P11
P21
P31
P41
P51
P61
P71
P81
P91
1
0
1
1
1
1
1
1
0
1
Output mode
TMP93CS20
2004-02-10
P30 (Note 1)
PA0
P00
P10
P20
P40
P50
P60
P70
P80
P90
0
0
1
1
1
1
1
1
0
1