TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 97

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
T32MOD
(0028H)
Bit symbol
Read/Write
After reset
Function
Operation mode
00: 8-bit timer
01: 16-bit timer
10: 8-bit PPG
11: 8-bit PWM
T32M1
7
0
Figure 3.7.7 Registers for 8-Bit Timers (3/5)
Timer 3 and Timer 2 Mode Control Register
T32M0
6
0
PWM cycle
00: Don’t care
01: 2
10: 2
11: 2
PWM21
5
0
6
7
8
− 1
− 1
− 1
93CS20-95
PWM20
4
0
R/W
Input clock signal of timer 2
Input clock of timer 3
Select PWM cycle
Set the operation modes of timers 2 and 3.
Source clock of timer 3
00: TO2TRG
01: φT1
10: φT16
11: φT256
T3CLK1
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
3
0
External Input (TI2 pin input)
φT1
φT4
φT16 (Prescaler)
T32MOD<T32M1:0> ≠ 01
Comparator output of
timer 2
Internal clock φT1
Internal clock φT16
Internal clock φT256
Don’t care
(2
(2
(2
Two 8-bit timers
16-bit timer
8-bit PPG output
8-bit PWM output (Timer 2)
8-bit timer (Timer 3)
6
7
8
− 1) × Timer 2 input clock cycle
− 1) × Timer 2 input clock cycle
− 1) × Timer 2 input clock cycle
T3CLK0
(Prescaler)
(Prescaler)
2
0
Source clock of timer 2
00: TI2 pin input
01: φT1
10: φT4
11: φT16
T2CLK1
1
0
T32MOD<T32M1:0> = 01
(16-bit timer mode)
output of timer 2
Overflow
T2CLK0
TMP93CS20
0
0
2004-02-10

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