TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 39

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
3.4.2
Micro DMA
DMA function. When an interrupt is accepted, in addition to an interrupt vector, the CPU
receives data indicating whether it is to be processed in micro DMA mode or in
general-purpose interrupt mode. The CPU performs micro DMA processing only if that
mode is requested.
TLCS-90 micro DMA because it has transfer parameters in dedicated registers in the CPU.
Since those dedicated registers are assigned as CPU control registers, they can only be
accessed by the LDC instruction.
(1) Micro DMA operation
In addition to the conventional interrupt processing, the TMP93CS20 also has a micro
The micro DMA of the TMP93CS20 can process at very high speed compared with the
micro DMA start vector value set in the interrupt controller. The micro DMA has four
channels, so that it can be set for up to four types of interrupt sources at the same time.
the transfer source address to the transfer destination address set in the control
register, and the transfer counter is decremented. If the value in the counter after
decrementing is other than 0, micro DMA processing is completed; if the value in the
counter after decrementing is 0, general-purpose interrupt processing is performed.
addresses. However, the TMP93CS20 has only 24 address pins for output. A 16-Mbyte
space is available for the micro DMA.
decrementing, and fixing the transfer source and destination addresses after transfer
can be done in both modes. Therefore data can easily be transferred between I/O and
memory and between different I/Os. For details of transfer modes, see the description
of transfer mode registers.
initial value of the transfer counter is 0000H) can be performed for one interrupt
source by micro DMA processing.
micro DMA, general-purpose interrupt processing is performed. After processing the
general-purpose interrupt, restarting the interrupts of the same channel restarts the
transfer counter from 65536. It is necessary to reset the transfer counter in the
general-purpose interrupt processing routine.
DMA start vectors are listed in Table 3.4.1.
(INC) mode.
Micro DMA operation starts when the accepted interrupt vector value matches the
When a micro DMA interrupt is accepted, data are automatically transferred from
32-bit control registers are used for setting transfer source and destination
There are two data transfer modes: 1-byte mode and 1-word mode. Incrementing,
The transfer counter has 16 bits, so up to 65536 transfers (the maximum when the
When the transfer counter is decremented to 0 after data are transferred by the
Interrupt sources handled by micro DMA processing are 36 in total, and the micro
The following timing chart is a micro DMA cycle of the transfer address increment
(Conditions: 16-bit bus width for 16 Mbytes, 0 waits.)
93CS20-37
TMP93CS20
2004-02-10

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