TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 9

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
P80
TXD1
P81
RXD1
P82
TI2
P83
TO3
P84
P85
P86
XT1
P87
XT2
P90 to P97
SEG24 to SEG31
PA0 to PA7
SEG32 to SEG39
SEG0 to SEG23
COM0 to COM3
AVCC
AVSS
VREFH
VREFL
X1
X2
ALE
CLK
VCC
VSS
TEST1
TEST2
C0, C1, V1 to V3
RESET
EA
WAIT
Note: All pins that have built-in pull-up resistors can be disconnected from the built-in pull-up resistor by
Pin Name
software.
Number of
Pins
24
1
1
1
1
1
1
1
1
8
8
4
1
1
1
1
1
1
1
1
1
1
3
8
2
5
Power supply
Power supply
Power supply
Power supply
Table 2.2.1 Pin Names and Function (3/3)
LCD pin
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Port 80: I/O port (with programmable open drain).
Serial send data 1.
Port 81: I/O port (with programmable open drain).
Serial receive data 1.
Port 82: I/O port (with programmable open drain).
Timer input 2: 8-bit timer 2 input pin.
Port 83: I/O port (with programmable open drain).
Timer output 3: 8-bit timer 2, 3 output pin.
Port 84: I/O port (with programmable open drain).
Wait: Pin used to request CPU bus wait.
Port 85: I/O port (with programmable open drain).
Port 86: I/O port (Open drain).
Low-frequency oscillator connecting pin.
Port 87: I/O port (Open drain).
Low-frequency oscillator connecting pin.
Port 90 to 97: Output port (Open drain).
Segment data output pin.
Port A0 to A7: Output port, large current port (Open drain).
LCD segment output pin.
LCD segment output.
LCD common output.
Power supply pin for AD converter.
GND pin for AD converter (0 V).
Pin for reference voltage input to AD converter (H).
Pin for reference voltage input to AD converter (L).
Oscillator connecting pin.
Oscillator connecting pin.
Reset: Initializes LSI.
Address latch enable.
Can be disabled for reducing noise.
Clock output: Outputs “external input clock X1 ÷ 4” clock.
Pulled-up during reset.
Can be disabled for reducing noise.
The VCC pin should be connected.
Power supply pin (All Vcc pins should be connected with the power supply pin).
GND pin (0 V) (All Vss pins should be connected with GND (0 V)).
TEST1 should be connected with TEST2 pin.
Do not connect to any other pins.
LCD drive boosting pin. A condenser should be connected between C0 and C1,
V1, V2, V3 and GND.
93CS20-7
Functions
TMP93CS20
2004-02-10

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