TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 156

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

(2) Baud rate generator
input to this prescaler. This is selected by prescaler clock selection register
SYSCR0<PRCK1:0>.
among the prescaler outputs.
TRUN<PRRUN>. Counting starts when <PRRUN> is set to 1. The prescaler is cleared
to 0 and stops operation when <PRRUN> is set to 0.
0 to stop this prescaler before the HALT instruction is executed.
to determine the transfer rate of the serial channel.
the 9-bit prescaler which is shared by the timers. One of these input clocks is selected
by the baud rate generator control register BR0CR<BR0CK1:0>.
n + m/16 (n = 2 to 15, m = 0 to 15) to 16 values to determine the transfer rate.
BRADD0<BR0K3:0>.
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The clock selected among f
Resetting sets <PRCK1:0> to 00 and selects the f
The baud rate generator selects between 4 clock inputs: φT0, φT2, φT8, and φT32
The prescaler can be run or stopped by the timer operation control register
When the IDLE1 mode (Only the oscillator operates) is used, set TRUN<PRRUN> to
The baud rate generator is a circuit that generates transmission and receiving clocks
The input clock to the baud rate generator, φT0, φT2, φT8, or φT32, is generated by
The baud rate generator includes a frequency divider, which divides frequency by 1,
The transfer rate is determined by setting BR0CR<BR0ADD, BR0S3:0> and
UART mode
I/O interface mode
(1) BR0CR<BR0ADD> = 0
(2) BR0CR<BR0ADD> = 1
BK0CR<BR0ADD> to 0 before dividing by N.
explained below.
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N + (16 − K)/16 division function is not available in I/O interface mode. Set
How to calculate a transfer rate when the baud rate generator is used is
the selected prescaler clock by N which is set to BR0CK<BR0S3:0> (N = 1, 2,
3...16).
divides the selected prescaler clock by N + (16 − K)/16 according to N set to
BR0CR<BR0S3:0> (N = 2, 3...15) and K set to BRADD0<BR0K3:0> (K = 1, 2,
3...15).
Note: At N = 1 or 16, N + (16 − K)/16 division function is disabled. Set
UART mode
I/O interface mode
Setting BRADD0<BR0K3:0> is ignored. The baud rate generator divides
N + (16 − K)/16 division function is enabled. The baud rate generator
Baud rate
Baud rate
BR0CR<BR0ADD> to 0.
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93CS20-154
Frequency divisor of baud rate generator
Frequency divisor of baud rate generator
FPH
Input clock of baud rate generator
Input clock of baud rate generator
clock, fc/16 clock, and fs clock is divided by 4 and
FPH
clock input divided by 4.
÷ 16
÷ 2
TMP93CS20
2004-02-10