TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 72

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

P6FC
(0016H)
P6
(0012H)
P6CR
(0014H)
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Note 1: Read-modify-write is prohibited for register P6CR and P6FC.
Note 2: To use P61 and P62 as serial bus interface I/O pins (I
Note 3: P64/RXD0 pin does not have a register changing if from port to function. For example, when it is used as an
Setting P67 as TO1 output
P6FC<P67F>
P6CR<P67C>
0
1
these ports to open-drain output mode.
input port, this pin is set to the serial channel 0 as a serial receive data.
INT7 input disable
INT7 input enable
0: Port
1: TO1
P67C
P67F
P67
7
7
7
1
0
0
0: Port
1: INT7
1
1
P66C
P66
I7IE
W
6
6
6
1
0
0
Figure 3.5.20 Registers for Port 6
0: Port
1: SCLK0
Port 6 Function Register
Port 6 Control Register
P65C
P65F
P65
5
5
5
1
0
0
Port 6 Register
93CS20-70
P6FC<P63F>
P6CR<P63C>
P6FC<P65F>
P6CR<P65C>
Setting P63 as TXD0 output
Setting P65 as SCLK output
0: Input 1: Output
P64C
P64
4
1
4
0
4
Input mode
R/W
W
0: Port
1: TXD0
P63C
P63F
P63
2
3
1
3
0
3
0
C bus mode), set P6ODE<ODE62:61> to 11 and
1
1
1
1
<P62F>
0: Port
1: SCL/SI
P62C
P62F
P62
2
1
2
0
2
0
<P62C>
0
1
P62 function setting (Note 2)
W
0: Port
1: SDA/SO
P61C
Port input
SI Input
P61F
P61
P6FC<P60F>
P6CR<P60C>
P6FC<P61F>
P6CR<P61C>
Setting P60 as SCK output
Setting P61 as SDA I/O or
SO output (Note 2)
1
1
1
1
0
0
0
0: Port
1: SCK
P60C
P60F
P60
TMP93CS20
0
0
0
1
0
0
Port output
SCL I/O
2004-02-10
1
1
1
1
1