TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 50

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

DMA0V
(007CH)
DMA1V
(007DH)
DMA2V
(007EH)
DMA3V
(007FH)
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Note:
(3) Micro DMA start vector
simultaneously compares the interrupt vector with each channel’s micro DMA start
vector (Bits 2 to 6 of the interrupt vector). When the two match, the interrupt from the
channel whose value matched is processed in micro DMA mode.
channel number has a higher priority.
Read-modify-write is not possible for DMA0V to DMA3V.
When the CPU reads the interrupt vector after accepting an interrupt, it
If the interrupt vector matches more than one channel, the channel with the lower
Micro DMA channel 0 processed by matching bits 2 to 6 of the interrupt vector.
Micro DMA channel 1 processed by matching bits 2 to 6 of the interrupt vector.
Micro DMA channel 2 processed by matching bits 2 to 6 of the interrupt vector.
Micro DMA channel 3 processed by matching bits 2 to 6 of the interrupt vector.
7
7
7
7
Figure 3.4.8 Micro DMA State Vector Register
6
6
6
6
Micro DMA 0 State Vector
Micro DMA 1 State Vector
Micro DMA 2 State Vector
Micro DMA 3 State Vector
DMA0V5
DMA1V5
DMA2V5
DMA3V5
5
5
5
5
0
0
0
0
93CS20-48
DMA0V4
DMA1V4
DMA2V4
DMA3V4
4
0
4
0
4
0
4
0
DMA0V3
DMA1V3
DMA2V3
DMA3V3
3
0
3
0
3
0
3
0
W
W
W
W
DMA0V2
DMA1V2
DMA2V2
DMA3V2
2
0
2
0
2
0
2
0
DMA0V1
DMA1V1
DMA2V1
DMA3V1
1
1
1
1
0
0
0
0
DMA0V0
DMA1V0
DMA2V0
DMA3V0
TMP93CS20
0
0
0
0
0
0
0
0
2004-02-10