TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 73

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
3.5.8
Port 7 (P70 to P77)
7 as an input port and connects a pull-up resistor. In addition to functioning as a
general-purpose I/O port, port 7 also functions as an input for 16-bit timer 8 and A clocks,
an output for 16-bit timer F/F 8 and A output, internal clock output, and a non-maskable
interrupt input. Resetting resets the function register P7CR, P7FC value to 0, and sets all
bits to input ports.
(1) P70 (TI8/INT8), P71 (TI9/INT9), P72 (TO8), P74 (TIA/INTA), P75 (TIB/INTB), P76
Port 7 is a 8-bit general-purpose I/O port. I/O can be set on a bit basis. Resetting sets port
(TOA)
TI8, TI9, TIA, TI B
Figure 3.5.21 Port 7 (P70, P71, P72, P74, P75, and P76)
Timer output
TO8: Timer 8
TOA: Timer A
Direction control
Direction control
Function control
(on bit basis)
(on bit basis)
(on bit basis)
Output latch
Output latch
P7CR write
P7CR write
P7FC write
P7 read
P7 read
P7 write
P7 write
Reset
Reset
S
S
INT8, INTA
INT9, INTB
93CS20-71
A
B
Selector
Selector
Selector
S
S
S
Rising/falling edge detect
Rising edge detect
B
A
B
A
P-ch
P-ch
P70 (TI8/INT8)
P71 (TI9/INT9)
P74 (TIA/INTA)
P75 (TIB/INTB)
P72 (TO8)
P76 (TOA)
Programmable
pull-up resistor
Programmable
pull-up resistor
TMP93CS20
2004-02-10

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