TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 53

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

X: Don’t care, n: Corresponding port number
Port No.
Port 0
Port 1
Port 2
Port 3
Port 4
Note 1: When P40 to P47 are used as KEY input, KEY input is enabled by the KEYCR register.
P00 to P07
P10 to P17
P20 to P27
P30
P31
P32 to P37
P32
P33 to P36
P37
P40 to P47
P40
P42
P41
P43
P44 to P47
Pin No.
Table 3.5.2 I/O Registers and Specifications (1/2)
Input port
Output port
AD0 to AD7 bus
Input port
Output port
AD8 to AD15 bus
A8 to A15 output
Input port (without PU)
Input port (with PU)
Output port
A0 to A7 output
A16 to A23 output
Output port
Outputs
space
Always outputs
Output port
Outputs
space
Input port (without PU)
Input port (with PU)
Output port
INT0 to INT3 input
INT4 input
Input port (without PU)
Input port (with PU)
Output port
TI4 input port (without PU)
TI4 input port (with PU)
KEY0 input (Note 1)
TI6 input port (without PU)
TI6 input port (with PU)
KEY2 input (Note 1)
TO4 output
KEY1 input (Note 1)
TO6 output
KEY3 input (Note 1)
KEY4 to KEY7 input (Note 1)
HWR
ADTRG
output
RD
input
WR
only when accessing external
93CS20-51
only when accessing external
RD
Function
Pn
×
×
×
×
×
×
×
0
1
×
0
0
×
1
0
×
×
0
1
×
×
×
×
×
0
1
×
0
1
×
0
1
×
×
×
×
×
×
I/O Register
PnCR
None
None
0
1
×
0
1
0
1
0
0
1
0
1
0
0
1
1
0
0
0
0
0
1
0
0
0
0
0
0
1
0
1
0
0
TMP93CS20
2004-02-10
PnFC
None
None
None
None
0
0
1
1
0
0
0
1
1
0
1
1
0
1
0
0
0
1
1
1
×
0
0
0
1
×
1
×