TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 191

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
<SIOS>
<SIOF>
<SEF>
SCK pin (Output)
SO pin
INTS2
interrupt request
SBIDBR
<SIOS>
<SIOF>
<SEF>
SCK pin (Input)
SO pin
INTS2
interrupt request
SBIDBR
SCK pin
<SIOF>
SO pin
STEST1:
STEST2:
Example:
Write transmitted data
Write transmitted data
Figure 3.10.24 Transmitted Data Hold Time at End of Transmit
*
*
a
a
a 0
a 0
Bit6
Program to stop transmitting data (when external clock is used)
BIT
JR
BIT
JR
LD
b
b
a 1
a 1
Figure 3.10.23 Transfer Mode
a 2
a 2
SEF, (SBISR)
NZ, STEST1
0, (P6)
Z, STEST2
(SBICR1), 00000111B
a 3
a 3
a 4
a 4
93CS20-189
Bit7
a 5
a 5
t
SODH
a 6
a 6
(b) External clock
(a) Internal clock
= Min 3.5/f
a 7
a 7
b 0
b 0
;
;
;
b 1
b 1
FPH
If <SEF> = 1 then loop.
If SCK = 0 then loop.
<SIOS> ← 0.
b 2
b 2
Clear <SIOS>
[s] (in NORMAL mode)
b 3
b 3
Clear <SIOS>
b 4
b 4
b 5
b 5
b 6
b 6
b 7
b 7
TMP93CS20
2004-02-10

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