TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 92

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
2.
prescaler. The selection is made by system clock control register SYSCR0<PRCK1:0>.
prescaler output.
Counting starts when <PRRUN> is set to 1. The prescaler is cleared to 0 and stops
operation when <PRRUN> is set to 0.
to “0” to reduce the power consumption of the prescaler before the “HALT” instruction is
executed.
Up counter
T10MOD or T32MOD.
the TI0 and TI2 pins, and the three internal clocks φT1, φT4, and φT16, according to the
value set in T10MOD<T0CLK1:0> or T32MOD<T2CLK1:0>.
timer mode is set, the overflow outputs of timer 0 and timer 2 are used as the input clock.
When any mode other than 16-bit timer mode is set, the input clock is selected from among
the internal clocks φT1, φT16, and φT256 as well as the comparator outputs (Match
detection signal) of timer 0 and timer 2 according to the set value of the T10MOD and te
T32MOD registers.
Example:
reset, it is initialized to T10MOD<T10M1:0> = 00 and T32MOD<T32M1:0> = 00 whereby
the up counter is placed in the 8-bit timer mode.
timer by the timer operation control register TRUN. When reset, all up counters will be
cleared to stop the timers.
The timer clock selected among f
Resetting sets <PRCK1:0> to 00, which selects the f
The 8-bit timers 0 and 1 select among 4 clock inputs: φT1, φT4, φT16, and φT256 of the
This prescaler can be run or stopped by the timer control register TRUN<PRRUN>.
Resetting clears <PRRUN> to 0 and stops the prescaler.
When the Idle1 mode (in which only the oscillator operates) is used, set TRUN<PRRUN>
This is an 8-bit binary counter which counts up by the input clock pulse specified by
The input clocks of timer 0 and timer 2 are selected from among the external clock from
The input clocks used by timer 1 and timer 3 depend on the operation mode. When 16-bit
Similarly, operation mode is also set by the T10MOD and the T32MOD registers. When
The counting and stop and clear of the up counter can be controlled for each interval
When T10MOD<T10M1:0> = 01, the overflow output of timer 0 becomes the input clock of timer 1
(16-bit timer mode).
When T10MOD<T10M1:0> = 00 and T10MOD<T1CLK1:0> = 01, φT1 becomes the input of timer 1
(8-bit timer mode).
93CS20-90
FPH
, fc/16, and fs is divided by 4 and input to this
FPH
clock input to be divided by 4.
TMP93CS20
2004-02-10

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