TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 128

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

T8FFCR
(0039H)
Bit symbol
Read/Write
After reset
Function
Figure 3.8.16 Registers for 16-Bit Timer/Event Counter (2/4)
7
6
Timer 8 Flip-flop Control Register
Inverted
when the
UC value is
latched to
CAP9
CAP9T8
5
0
93CS20-126
Inverted
when the
UC value is
latched to
CAP8
TFF8 invert trigger
0: Disable trigger
1: Enable trigger
CAP8T8
4
0
R/W
Timer flip-flop 8 (TFF8) control
Timer flip-flop 8 (TFF8) invert trigger when up
counter matches TREG8
Timer flip-flop 8 (TFF8) invert trigger when up counter
matches TREG9
Timer flip-flop 8 (TFF8) invert trigger when the up
counter value is latched to CAP8
Timer flip-flop 8 (TFF8) invert trigger when the up
counter value is latched to CAP9
00
01
10
11
Inverted
when the
UC value
matches
TREG9
0
1
0
1
0
1
0
1
EQ9T8
3
0
Inverts the TFF8 value (Software inversion).
Sets TFF8 to 1.
Clear TFF8 to 0.
Don’t care
Trigger disable (Disable inversion)
Trigger enable (Enable inversion)
Trigger disable (Disable inversion)
Trigger enable (Enable inversion)
Trigger disable (Disable inversion)
Trigger enable (Enable inversion)
Trigger disable (Disable inversion)
Trigger enable (Enable inversion)
Inverted
when the
UC value
matches
TREG8
EQ8T8
2
0
TFF8 control
00: Invert TFF8
01: Set TFF8
10: Clear TFF8
11: Don’t care
* Always read as 11
TFF8C1
1
1
W
TMP93CS20
TFF8C0
2004-02-10
0
1