TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 170

no-image

TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
Main
P6CR
P6FC
INTES0
SC0MOD
SC0BUF
INTTX0 interrupt
SC0MOD
SC0BUF
Main
P6CR
P6FC
P6ODE
INTES0
SC0MOD
INTRX0 interrupt
Acc
if Acc = Select code
Then SC0MOD
Setting example: To link two slave controllers serially with the master controller, and use the internal clock φ1 as
the purposes of explanation.
Since serial channels 0 and 1 operate in exactly the same way, channel 0 is used for
Setting the master controller
Setting the slave controller
← − − − 0 1 − − −
← − − − X 1 − − −
← 1 1 0 0 1 1 0 1
← 1 0 1 0 1 1 1 0
← 0 0 0 0 0 0 0 1
← 0 − − − − − − −
← *
← − − − 0 1 − − −
← − − − X 1 − − −
← X X X 1 − − − X
← 1 1 0 1 1 1 1 0
← 0 0 1 1 1 1 1 0
← SC0BUF
← − − − 0 − − − −
TXD
*
the transfer clock.
Master
*
*
*
RXD
*
*
93CS20-168
*
TXD
Select code
00000001
Slave 1
Select P63 as TXD0 pin and P64 as RXD0 pin.
Enable INTTX0 and set the interrupt level 4.
Enable INTRX0 and set the interrupt level 5.
Set φ1 as the transmission clock in 9-bit UART mode.
Set the select code for slave controller 1.
Sets TB8 to 0.
Set data for transmission.
Select P64 as RXD0 pin and P63 as TXD0 pin (Open-drain
output).
Enable INTRX0 and INTTX0.
Set <WU> to 1 in the 9-bit UART transmission mode with
transfer clock φ1.
Clear <WU> to 0.
RXD
TXD
Select code
00001010
Slave 2
RXD
TMP93CS20
2004-02-10

Related parts for TMP93xy20FG