TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 165

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

Timing to write
transmission data
SCLK0 output
TXD0
TXDSFT
ITX0C
(INTTX0 interrupt request)
SCLK0 input
(SCLKS = 0:
Rising edge mode)
SCLK0 input
(SCLKS = 1:
Falling edge mode)
TXD0
TXDSFT
ITX0C
(INTTX0 interrupt request)
Figure 3.9.22 Transmitting Operation in I/O Interface Mode (SCLK0 output mode)
Figure 3.9.23 Transmitting Operation in I/O Interface Mode (SCLK0 input mode)
a.
Transmission
pin and SCLK0 pin respectively, each time the CPU writes data to the
transmission buffer. When all data is output, INTES0<ITX0C> will be set to
generate the INTTX0 interrupt.
becomes active after data are written to the transmission buffer by CPU.
interrupt.
In SCLK output mode, 8-bit data and synchronous clock are output from TXD0
In SCLK input mode, 8-bit data is output from TXD0 pin when SCLK0 input
When all data is output, INTES0<ITX0C> will be set to generate INTTX0
(Channel 0)
(Channel 0)
Bit0
93CS20-163
Bit0
Bit1
Bit1
Bit5
Bit6
Bit6
Bit7
Bit7
TMP93CS20
2004-02-10