TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 171

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
3.10 Serial Bus Interface (SBI)
X: Don’t care
canceller
3.10.1
I
Clock synchronous
8-bit SIO mode
2
Noise
C bus mode
fc/4
8-bit serial bus interface and an I
in the I
8-bit SIO mode.
devices scramble for the bus control. In master mode, other devices which are connected on the
same bus need be slave devices (Single master).
The TMP93CS20 has a 1-channel serial bus interface which employs a clocked-synchronous
The serial bus interface is connected to an external device through P61 (SDA) and P62 (SCL)
TMP93CS20 has no an arbitration function which is necessary when two or more master
Setting of every pins are as follows.
Configuration
SBI control
register 2/
SBI status
register
SBICR2/
2
I
Control
control
Divider
SBISR
2
Sync.
C bus mode; and through P60 (SCK), P61 (SO), and P62 (SI) in the clocked-synchronous
clock
clock
C bus
SIO
+
ODE<ODE62:61>
I
address
register
2
Transfer
C bus
control
I2CAR
circuit
XX
11
Figure 3.10.1 Serial Bus Interface (SBI)
INTS2 interrupt request
2
SBI data
buffer
register
C bus.
SBIDBR
P6CR<P62C, P61C, P60C>
register
Shift
93CS20-169
11X
011
010
SBI control
register 1
data control
data control
SBICR1
I
2
C bus
SIO
SBI control
register 3
canceller
SBICR3
Noise
P6FC<P62F, P61F, P60F>
SCL
SCK
SO
SI
SDA
control
output
Input/
110
111
TMP93CS20
2004-02-10
P60
(SCK)
P61
(SO/SDA)
P62
(SI/SCL)

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