TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 22

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

3.3.2
3.3.3
Table 3.3.4 States of the <CLKEN> Register, and CLK Pin Operation after Reset
Prescaler Clock Controller
6, timer 8, and timer A, and serial interface 0 and serial interface 1.
fs according to the value in the SYSCR0<PRCK1:0> register.
to 0 to reduce the power consumption before a HALT instruction is executed.
Internal Clock Pin Output Function
(1) P73/SCOUT pin
(2) CLK pin
Output clock
The 9-bit prescaler provides a clock signal to the 8-bit timers 0 to 3, 16-bit timer 4, timer
The clock input to this prescaler is a clock signal which is selected as either f
The <PRCK1:0> register is initialized to 00 by resetting.
When the IDLE1 mode (Operating only the oscillator) is being used, set TRUN<PRRUN>
Note: To set <CLKEN> = 0 and set CLK pin to high impedance, pull up externally to
control register CKOCR<SCOEN and SCOSEL> specify the clock and the pins. The
P73/SCOUT pin is assigned as the input port in resetting.
it can assume on condition that the P73/SCOUT pin is specified as SCOUT output.
CKOCR<CLKEN>. Writing 1 sets the clock output, and writing 0 sets the CLK pin to
high impedance. CKOCR<CLKEN> is set to 0 upon resetting.
<CLKEN> register. (See “TMP93CS20 Reset Timing Chart” in Figure 3.1.1.)
The P73/SCOUT pin outputs the internal clock signals f
One bit in the port 7 control register P7CR<P73C>, and two bits in the clock output
Table 3.3.3 shows states of the SCOUT pin in the alternative operation modes which
The CLK pin outputs the internal clock signal f
The type of output is determined by one bit in the clock output control register,
During resetting, the CLK pin is internally pulled up regardless of the value of the
Operation mode
Table 3.3.3 SCOUT Pin States in Alternative Operation Modes
f
f
FPH
SYS
TMP93CS20
Type No.
prevent through current which follows to the input buffer of CLK pin.
Outputs f
Outputs f
NORMAL, SLOW
FPH
SYS
CKOCR<CLKEN>
clock.
clock.
93CS20-20
0
RUN, IDLE2, IDLE1
HALT Mode
CLK pin operation
SYS
High impedance
divided by 2.
Fixed to “0” or “1”.
FPH
STOP
or f
SYS
.
TMP93CS20
FPH
2004-02-10
, fc/16, or