TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 140

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TMP93xy20FG

Manufacturer Part Number
TMP93xy20FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP93xy20FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/P
Rom Combinations
64
Ram Combinations
2
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
4
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
88
Power Supply Voltage(v)
4.5 to 5.5
Count clock
(Internal clock)
TI8 pin input
TI9 pin input
Loading into CAP8
Loading into CAP9
INT8
INT9
4. Time difference measurement
edges of external pulses input.
internal clock, the UC8 value is loaded into CAP8 on the rising edge of the
input pulse to TI8. Then the interrupt INT8 is generated.
pulse to TI9, generating the interrupt INT9.
difference between the time counts at which loading the up counter value into
CAP8 and CAP9 was performed. (= (CAP9 − CAP8) × the internal clock cycle)
This mode is used to measure the difference in time between the rising
While keeping the 16-bit up counter UC8 counting (Free running) with the
Similarly, the UC8 value is loaded into CAP9 on the rising edge of the input
The time difference between these pulses can be obtained from the
Figure 3.8.26 Time Difference Measurement
C1
Time difference
93CS20-138
C2
TMP93CS20
2004-02-10

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