TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 203

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

Analog Input Channel
(6) Storing and reading the AD conversion result
(Port 5)
(ADREG04H/L to ADREG37H/L). These registers are read only.
from ADREG04H/L to ADREG37H/L. Except in this mode, AD conversion results for
channel AN0 and AN4, AN1 and AN5, AN2 and AN6, AN3 and AN7 are stored
severally ADREG04H/L, ADREG15H/L, ADREG26H/L, ADREG37H/L.
conversion result registers.
The flag shows that whether those registers are read or not. When AD conversion
results are stored in those registers (ADREGxH or ADREGxL), this flag is set to 1.
When each register is read, this flag is cleared to 0, and AD conversion end flag
ADMOD0<EOCF> is also cleared to 0.
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Table 3.11.3 Correspondence between Analog Input Channels and
AD conversion results are stored in AD conversion result registers high/low
In fixed channel repeat conversion mode, AD conversion results are stored in order
Figure 3.11.3 shows correspondence between analog input channels and AD
AD conversion result registers bit 0 is AD conversion result stored flag <ADRxRF>.
AD Conversion Result Registers
Conversion Modes
Except Right
ADREG04H/L
ADREG15H/L
ADREG26H/L
ADREG37H/L
ADREG04H/L
ADREG15H/L
ADREG26H/L
ADREG37H/L
93CS20-201
AD Conversion Result Registers
(Every fourth conversion)
Fixed Channel Repeat
Conversion Mode
ADREG04H/L
ADREG15H/L
ADREG26H/L
ADREG37H/L
TMP93CS20
2004-02-10