TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 154

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

System clock f
(Shared by P81)
SC1MOD<RXE>
RXD1
SYS
RXDCLK
Note 1: No I/O interface mode in Channel 1.
Note 2: No handshake function in Channel 1.
φT0
φT2
φT8
φT32
(φ1)
Serial clock generation circuit
Figure 3.9.15 shows the block diagram of the serial channel 1.
RB8
Receive counter
BR1CR<BR1CK1:0>
Receive control
Receive buffer 1 (Shift register)
(÷ 16)
Receive buffer 2 (SC1BUF)
Baud rate generator
<BR1S3:0>
Figure 3.9.15 Block Diagram of the Serial Channel 1
BR1CR
<BR1ADD>
BR0CR
SC1MOD
<WU>
<BR1K3:0>
BRADD1
<OERR> <PERR> <FERR>
INTRX1
<PE>
93CS20-152
interrupt control
Serial channel
Internal data bus
Parity control
TO0TRG
(
Error flag
Timer 0 comparator output
SC1CR
SC1CR
SC1MOD
<SC1:0>
<EVEN>
INTTX1
UART
mode
SC1MOD
<SM1:0>
TXDCLK
TB8
)
Transmission
Transmission
Transmission buffer (SC1BUF)
SIOCLK
counter
control
(÷ 16)
TMP93CS20
2004-02-10
(Shared by P80
TXD1
)