TMP93xy20FG Toshiba, TMP93xy20FG Datasheet - Page 83

• Manufacturer Part Number: TMP93xy20FG
• Manufacturer: Toshiba

Specifications of TMP93xy20FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M/P
• Rom Combinations: 64
• Ram Combinations: 2
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: -
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 4
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: -
• Dual Clock: Y
• Number Of I/o Ports: 88
• Power Supply Voltage(v): 4.5 to 5.5

Number of address
bus pins
Number of data bus
pins
Number of multiplexed
pins
3.6
function
Note 1: In the cases of 3. and 4., the data bus signals output the addresses because the signals are also
Note 2: After a reset operation, port 0, port 1, and port 2 of the TMP93CS20 function as input ports.
Mode
pins
Port
3.6.1
Timing chart
Bus Width/Wait Controller
(
WAIT
used as the address bus. By writing 0 to bit CKOCR<ALEEN>, the ALE signal can be prevented
from outputting.
The TMP93CS20 has a built-in bus width/wait controller used to control chip select, wait
Port 0
Port 1
Port 2
Address/Data Bus Pins
an address and data bus for connecting the microcontroller to the external memories and
I/O peripherals.
EA
Port 0/AD0 to AD7, port 1/AD8 to AD15, and port 2/AD16 to AD23/A0 to A7 function as
pin), and data bus size (8 or 16 bits) for any of the three block address areas.
A23 to A8
AD7 to AD0
ALE
RD
Max 24 (to 16 Mbytes)
AD0 to AD7
A16 to A23
A8 to A15
1
8
8
A23 to A8
A7 to
A0
D7 to
D0
A23 to A16
AD15 to AD0
ALE
RD
Max 24 (to 16 Mbytes)
93CS20-81
AD8 to AD15
AD0 to AD7
A16 to A23
16
16
2
A23 to A16
to A0
A15
to D0
D15
V
IH
A15 to A0
AD7 to AD0
ALE
RD
Max 16 (to 64 Kbytes)
AD0 to AD7
A8 to A15
A0 to A7
3
8
0
A15 to A0
A7 to
A0
(Note 1)
D7 to
D0
A7 to A0
AD15 to AD0
ALE
RD
Max 8 (to 256 bytes)
AD8 to AD15
AD0 to AD7
A0 to A7
TMP93CS20
16
2004-02-10
4
0
to A0
A15
A7 to A0
(Note 1)
to D0
D15