LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 810

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 22 Timer Module (TIM16B8CV2) Block Description
22.3.2.18 Output Compare Pin Disconnect Register(OCPD)
Read: Anytime
Write: Anytime
All bits reset to zero.
22.3.2.19 Precision Timer Prescaler Select Register (PTPSR)
Read: Anytime
Write: Anytime
All bits reset to zero.
810
Module Base + 0x002C
Module Base + 0x002E
OCPD[7:0}
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
W
W
R
R
OCPD7
PTPS7
Output Compare Pin Disconnect Bits
0 Enables the timer channel port. Ouptut Compare action will occur on the channel pin. These bits do not affect
1 Disables the timer channel port. Output Compare action will not occur on the channel pin, but the output
0
0
7
7
the input capture or pulse accumulator functions
compare flag still become set .
Figure 22-29. Precision Timer Prescaler Select Register (PTPSR)
Figure 22-28. Ouput Compare Pin Disconnect Register (OCPD)
OCPD6
PTPS6
0
0
6
6
MC9S12XE-Family Reference Manual Rev. 1.23
Table 22-22. OCPD Field Description
OCPD5
PTPS5
5
0
5
0
OCPD4
PTPS4
0
0
4
4
Description
OCPD3
PTPS3
0
0
3
3
OCPD2
PTPS2
2
0
2
0
OCPD1
Freescale Semiconductor
PTPS1
0
0
1
1
OCPD0
PTPS0
0
0
0
0