LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 508

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Chapter 13 Analog-to-Digital Converter (ADC12B16CV1)

This section lists all inputs to the ADC12B16C block.

This pin serves as the analog input Channel x. It can also be conﬁgured as digital port or external trigger

for the ATD conversion.

These inputs can be conﬁgured to serve as an external trigger for the ATD conversion.

Refer to device speciﬁcation for availability and connection of these inputs!

These pins are the power supplies for the analog circuitry of the ADC12B16C block.

This section provides a detailed description of all registers accessible in the ADC12B16C.

Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers

indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010

is the high reference voltage, V

Signal Description

Memory Map and Register Deﬁnition

Detailed Signal Descriptions

Module Memory Map

gives an overview on all ADC12B16C registers.

ANx (x = 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)

ETRIG3, ETRIG2, ETRIG1, ETRIG0

is deﬁned at the MCU level and the Address Offset is deﬁned at the module

Figure 13-2. ADC12B16C Register Summary (Sheet 1 of 3)

MC9S12XE-Family Reference Manual , Rev. 1.23

= Unimplemented or Reserved

is the low reference voltage for ATD conversion.

ICLKSTP ETRIGLE

SMP_DIS ETRIGCH3 ETRIGCH2 ETRIGCH1 ETRIGCH0

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