LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 301

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

GO_UNTIL command can not be aborted. Only the corresponding ACK pulse can be aborted by the
SYNC command.
Although it is not recommended, the host could abort a pending BDM command by issuing a low pulse in
the BKGD pin shorter than 128 serial clock cycles, which will not be interpreted as the SYNC command.
The ACK is actually aborted when a negative edge is perceived by the target in the BKGD pin. The short
abort pulse should have at least 4 clock cycles keeping the BKGD pin low, in order to allow the negative
edge to be detected by the target. In this case, the target will not execute the SYNC protocol but the pending
command will be aborted along with the ACK pulse. The potential problem with this abort procedure is
when there is a conflict between the ACK pulse and the short abort pulse. In this case, the target may not
perceive the abort pulse. The worst case is when the pending command is a read command (i.e.,
READ_BYTE). If the abort pulse is not perceived by the target the host will attempt to send a new
command after the abort pulse was issued, while the target expects the host to retrieve the accessed
memory byte. In this case, host and target will run out of synchronism. However, if the command to be
aborted is not a read command the short abort pulse could be used. After a command is aborted the target
assumes the next negative edge, after the abort pulse, is the first bit of a new BDM command.
Since the host knows the target serial clock frequency, the SYNC command (used to abort a command)
does not need to consider the lower possible target frequency. In this case, the host could issue a SYNC
very close to the 128 serial clock cycles length. Providing a small overhead on the pulse length in order to
assure the SYNC pulse will not be misinterpreted by the target. See
Timed Reference
Figure 7-13
command. Note that, after the command is aborted a new command could be issued by the host computer.
Figure 7-14
occur if a POD device is connected to the target BKGD pin and the target is already in debug active mode.
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
BKGD Pin
shows a SYNC command being issued after a READ_BYTE, which aborts the READ_BYTE
shows a conflict between the ACK pulse and the SYNC request pulse. This conflict could
READ_BYTE
The details about the short abort pulse are being provided only as a reference
for the reader to better understand the BDM internal behavior. It is not
recommended that this procedure be used in a real application.
Figure 7-13
Pulse”.
the READ_BYTE Command
READ_BYTE CMD is Aborted
Host
Figure 7-13. ACK Abort Procedure at the Command Level
and Starts to Execute
does not represent the signals in a true timing scale
by the SYNC Request
Memory Address
Target
BDM Decode
MC9S12XE-Family Reference Manual Rev. 1.23
(Out of Scale)
NOTE
NOTE
READ_STATUS
Host
SYNC Response
From the Target
(Out of Scale)
Chapter 7 Background Debug Module (S12XBDMV2)
Target
New BDM Command
Section 7.4.9, “SYNC — Request
New BDM Command
Host
Target
301