LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 138

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

1. Read: Anytime.

Chapter 2 Port Integration Module (S12XEPIMV1)

Address 0x0253

Address 0x0254

Write: Anytime.

Port M reduced drive—Select reduced drive for outputs

This register conﬁgures the drive strength of Port M output pins 7 through 0 as either full or reduced independent of

the function used on the pins. If a pin is used as input this bit has no effect.

1 Reduced drive selected (approx. 1/5 of the full drive strength).

0 Full drive strength enabled.

Port M pull device enable—Enable pull-up devices on input pins

These bits conﬁgure whether a pull device is activated, if the associated pin is used as an input or wired-or output.

This bit has no effect if the pin is used as push-pull output. Out of reset no pull device is enabled.

1 Pull device enabled.

0 Pull device disabled.

Port M Reduced Drive Register (RDRM)

Port M Pull Device Enable Register (PERM)

Figure 2-39. Port M Pull Device Enable Register (PERM)

Figure 2-38. Port M Reduced Drive Register (RDRM)

Table 2-36. RDRM Register Field Descriptions

Table 2-37. PERM Register Field Descriptions

MC9S12XE-Family Reference Manual , Rev. 1.23

Access: User read/write

Freescale Semiconductor