LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 467

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INIT_SCI
INIT_INT
INIT_XGATE
INIT_XGATE_BUSY_LOOP
INIT_XGATE_VECTAB_LOOP
COPY_XGATE_CODE
COPY_XGATE_CODE_LOOP
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;###########################################
;#
;###########################################
SEI
MOVB #(RAM_START_GLOB>>12), RPAGE
;###########################################
;#
;###########################################
MOVW #(BUS_FREQ_HZ/(16*9600)), SCIBDH;set baud rate
MOVB #(TIE|TE), SCICR2;enable tx buffer empty interrupt
;###########################################
;#
;###########################################
MOVB #(SCI_VEC&$F0), INT_CFADDR
MOVB #RQST|$01, INT_CFDATA+((SCI_VEC&$0F)>>1)
;###########################################
;#
;###########################################
MOVW #XGMCTL_CLEAR, XGMCTL
TST
BNE
LDX
LDD
STD
STD
STD
STD
STD
STD
STD
STD
CLR
MOVW #XGATE_VECTORS_XG, XGVBR
MOVW #$FF00, XGSWT
;###########################################
;#
;###########################################
LDAA #128
LDY
MOVW #XGATE_DUMMY_ISR_XG, 4,Y+
DBNE A, INIT_XGATE_VECTAB_LOOP
MOVW #XGATE_CODE_XG, RAM_START+(2*SCI_VEC)
MOVW #XGATE_DATA_XG, RAM_START+(2*SCI_VEC)+2
;###########################################
;#
;###########################################
LDX
MOVW 2,X+, 2,Y+
MC9S12XE-Family Reference Manual Rev. 1.23
XGCHID
INIT_XGATE_BUSY_LOOP
#XGIF
#$FFFF
2,X+
2,X+
2,X+
2,X+
2,X+
2,X+
2,X+
2,X+
XGISPSEL
#XGATE_VECTORS
#XGATE_DATA_FLASH
INITIALIZE XGATE VECTOR TABLE
INITIALIZE S12XE CORE
INITIALIZE S12X_INT
INITIALIZE XGATE
INITIALIZE SCI
COPY XGATE CODE
;wait until current thread is finished
;clear all channel interrupt flags
;set vector base register
;clear all software triggers
;build XGATE vector table
;set RAM page
;switch SCI interrupts to XGATE
;clear all XGMCTL bits
#
#
#
#
#
#
Chapter 10 XGATE (S12XGATEV3)
467