LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 35

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Freescale Semiconductor

Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers

indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010

Local Memory Map

NOTE: On smaller derivatives the ﬂash

memory map is split into 2 ranges separated

by an unimplemeted range, as depicted by

the dashed lines. For more information

refer to tables below and MMC section.

1K EEPROM window

16K FLASH window

2K REGISTERS

4K RAM window

Reset Vectors

Figure 1-2. MC9S12XE100 Global Memory Map

MC9S12XE-Family Reference Manual Rev. 1.23

Global Memory Map

Chapter 1 Device Overview MC9S12XE-Family

256 K EEEPROM

2K REGISTERS

Unimplemented