LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 651

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For microcontrollers without a clock and reset generator (CRG), CANCLK is driven from the crystal
oscillator (oscillator clock).
A programmable prescaler generates the time quanta (Tq) clock from CANCLK. A time quantum is the
atomic unit of time handled by the MSCAN.
A bit time is subdivided into three segments as described in the Bosch CAN 2.0A/B specification. (see
Figure
Freescale Semiconductor
16-44):
SYNC_SEG: This segment has a fixed length of one time quantum. Signal edges are expected to
happen within this section.
Time Segment 1: This segment includes the PROP_SEG and the PHASE_SEG1 of the CAN
standard. It can be programmed by setting the parameter TSEG1 to consist of 4 to 16 time quanta.
Time Segment 2: This segment represents the PHASE_SEG2 of the CAN standard. It can be
programmed by setting the TSEG2 parameter to be 2 to 8 time quanta long.
Transmit Point
SYNC_SEG
1
Bit Rate
NRZ Signal
Figure 16-44. Segments within the Bit Time
MC9S12XE-Family Reference Manual Rev. 1.23
(PROP_SEG + PHASE_SEG1)
Tq
=
=
8 ... 25 Time Quanta
-------------------------------------------------------------------------------- -
(
Time Segment 1
number of Time Quanta
----------------------------------------------------- -
(
= 1 Bit Time
4 ... 16
Prescaler value
Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
f
CANCLK
f
Tq
Sample Point
(single or triple sampling)
)
Time Segment 2
(PHASE_SEG2)
2 ... 8
)
Eqn. 16-2
Eqn. 16-3
651

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