LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 184
LFEBS12UB
Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Specifications of LFEBS12UB
Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Chapter 2 Port Integration Module (S12XEPIMV1)
2.4.2.4
If the pin is used as an output this register allows the configuration of the drive strength.
2.4.2.5
This register turns on a pull-up or pull-down device.
It becomes active only if the pin is used as an input or as a wired-or output.
2.4.2.6
This register selects either a pull-up or pull-down device if enabled.
It becomes only active if the pin is used as an input. A pull-up device can be activated if the pin is used as
a wired-or output.
2.4.2.7
If the pin is used as an output this register turns off the active high drive. This allows wired-or type
connections of outputs.
2.4.2.8
If the pin is used as an interrupt input this register serves as a mask to the interrupt flag to enable/disable
the interrupt.
184
Reduced drive register (RDRx)
Pull device enable register (PERx)
Polarity select register (PPSx)
Wired-or mode register (WOMx)
Interrupt enable register (PIEx)
Module
Figure 2-107. Illustration of I/O pin functionality
MC9S12XE-Family Reference Manual , Rev. 1.23
DDR
PTI
PT
data out
output enable
module enable
0
1
1
1
0
0
PIN
Freescale Semiconductor
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