LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 740

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 20 Serial Communication Interface (S12SCIV5)
20.3.2.9
Read: Anytime; reading accesses SCI receive data register
Write: Anytime; writing accesses SCI transmit data register; writing to R8 has no effect
740
Module Base + 0x0006
Module Base + 0x0007
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
SCIDRH
SCIDRH
SCIDRL
Reset
Reset
R[7:0]
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
T[7:0]
Field
7:0
R8
T8
7
6
W
W
R
R
Received Bit 8 — R8 is the ninth data bit received when the SCI is configured for 9-bit data format (M = 1).
Transmit Bit 8 — T8 is the ninth data bit transmitted when the SCI is configured for 9-bit data format (M = 1).
R7:R0 — Received bits seven through zero for 9-bit or 8-bit data formats
T7:T0 — Transmit bits seven through zero for 9-bit or 8-bit formats
R8
R7
T7
SCI Data Registers (SCIDRH, SCIDRL)
0
0
7
7
If the value of T8 is the same as in the previous transmission, T8 does not
have to be rewritten.The same value is transmitted until T8 is rewritten
In 8-bit data format, only SCI data register low (SCIDRL) needs to be
accessed.
When transmitting in 9-bit data format and using 8-bit write instructions,
write first to SCI data register high (SCIDRH), then SCIDRL.
= Unimplemented or Reserved
T8
R6
T6
0
0
6
6
Table 20-13. SCIDRH and SCIDRL Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 20-12. SCI Data Registers (SCIDRH)
Figure 20-13. SCI Data Registers (SCIDRL)
R5
T5
5
0
0
5
0
NOTE
R4
T4
0
0
0
4
4
Description
R3
T3
0
0
0
3
3
R2
T2
2
0
0
2
0
Freescale Semiconductor
R1
T1
0
0
0
1
1
R0
T0
0
0
0
0
0