LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 608

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
16.1.1
16.1.2
608
Wake-Up Interrupt Req.
Transmit Interrupt Req.
Receive Interrupt Req.
Errors Interrupt Req.
Oscillator Clock
Glossary
Block Diagram
Bus Clock
oscillator clock
CAN clock
bus clock
CPU bus
CAN bus
FIFO
CAN
CRC
ACK
EOF
SOF
IFS
MSCAN
MC9S12XE-Family Reference Manual , Rev. 1.23
Acknowledge of CAN message
Controller Area Network
Cyclic Redundancy Code
End of Frame
First-In-First-Out Memory
Inter-Frame Sequence
Start of Frame
CPU related read/write data bus
CAN protocol related serial bus
Direct clock from external oscillator
CPU bus related clock
CAN protocol related clock
Figure 16-1. MSCAN Block Diagram
MUX
Configuration
CANCLK
Table 16-2. Terminology
Registers
Control
Status
and
Presc.
Tq Clk
Wake-Up
Low Pass Filter
Message
Buffering
Receive/
Transmit
Filtering
Engine
and
Freescale Semiconductor
RXCAN
TXCAN