LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 233

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.1.4
The MPU module can be used in all MCU modes.
4.2
The MPU module has no external signals.
4.3
This section provides a detailed description of address space and registers used by the MPU module.
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Each descriptor can be configured to allow one of four types of access privilege for the defined
memory region
— Bus master has full access (read, write and execute enabled)
— Bus master can read and execute (write illegal)
— Bus master can read and write (execution illegal)
— Bus master can only read (write and execution illegal)
Accesses to memory not covered by any protection descriptor will cause an access violation
External Signal Description
Memory Map and Register Definition
Modes of Operation
MC9S12XE-Family Reference Manual Rev. 1.23
Chapter 4 Memory Protection Unit (S12XMPUV1)
233

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