LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1211

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
1
2
3
Num
11a
11b
12a
12b
1a
1b
2a
2b
6a
6b
7a
7b
10
13
14
15
The values for thermal resistance are achieved by package simulations for the 9S12XEQ512 die.
Junction to case thermal resistance was simulated to be equivalent to the measured values using the cold plate technique
with the cold plate temperature used as the “case” temperature. This basic cold plate measurement technique is described
by MIL-STD 883D, Method 1012.1. This is the correct thermal metric to use to calculate thermal performance when the
package is being used with a heat sink.
Thermal characterization parameter Ψ
case as defined in JESD51-2. Ψ
enviroment.
3
4
5
8
9
C
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
Thermal resistance single sided PCB, natural convection
Thermal resistance single sided PCB @ 200 ft/min
Thermal resistance double sided PCB
with 2 internal planes, natural convection
Thermal resistance double sided PCB
with 2 internal planes @ 200 ft/min
Junction to Board LQFP 144
Junction to Case LQFP 144
Junction to Package Top LQFP144
Thermal resistance single sided PCB, natural convection
Thermal resistance single sided PCB @ 200 ft/min
Thermal resistance double sided PCB
with 2 internal planes, natural convection
Thermal resistance double sided PCB
with 2 internal planes @ 200 ft/min
Junction to Board LQFP112
Junction to Case LQFP112
Junction to Package Top LQFP112
Thermal resistance single sided PCB, natural convection
Thermal resistance single sided PCB @ 200 ft/min
Thermal resistance double sided PCB
with 2 internal planes, natural convection
Thermal resistance double sided PCB
with 2 internal planes @ 200 ft/min
Junction to Board QFP 80
Junction to Case QFP 80
Junction to Package Top QFP 80
Table A-6. Thermal Package Characteristics (9S12XEQ512)
JT
is a useful value to use to estimate junction temperature in a steady state customer
MC9S12XE-Family Reference Manual Rev. 1.23
2
Rating
2
JT
2
is the “resistance” from junction to reference point thermocouple on top center of the
3
3
3
LQFP144
LQFP112
QFP80
Symbol
Ψ
Ψ
Ψ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
θ
JC
JC
JC
JA
JA
JA
JA
JB
JA
JA
JA
JA
JB
JA
JA
JA
JA
JB
JT
JT
JT
Min
Appendix A Electrical Characteristics
1
Typ
Max
49
40
40
34
28
50
40
40
34
28
50
40
37
31
23
13
9
2
9
2
3
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
1211

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