LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1073

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

The D-Flash user partition will start at global address 0x10_0000. The buffer RAM EEE partition will end

at global address 0x13_FFFF. After the Partition D-Flash operation has completed, the CCIF ﬂag will set.

Running the Partition D-Flash command a second time will result in the ACCERR bit within the FSTAT

direct D-Flash access (DFPART) or buffer RAM EEE access (ERPART).

Freescale Semiconductor

Program a duplicate DFPART to the EEE nonvolatile information register at global address

0x12_0002 (see

Program ERPART to the EEE nonvolatile information register at global address 0x12_0004 (see

Program a duplicate ERPART to the EEE nonvolatile information register at global address

0x12_0006 (see

Table 27-78. Partition D-Flash Command Error Handling

MC9S12XE-Family Reference Manual , Rev. 1.23

Set if CCOBIX[2:0] != 010 at command launch

Set if a Load Data Field command sequence is currently active

Set if command not available in current mode (see

Set if partitions have already been deﬁned

Set if an invalid DFPART or ERPART selection is supplied

Set if any errors have been encountered during the read

Set if any non-correctable errors have been encountered during the read

Error Condition

Chapter 27 512 KByte Flash Module (S12XFTM512K3V1)