LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 726

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 20 Serial Communication Interface (S12SCIV5)
20.1.2
The SCI includes these distinctive features:
20.1.3
The SCI functions the same in normal, special, and emulation modes. It has two low power modes, wait
and stop modes.
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Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
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Full-duplex or single-wire operation
Standard mark/space non-return-to-zero (NRZ) format
Selectable IrDA 1.4 return-to-zero-inverted (RZI) format with programmable pulse widths
13-bit baud rate selection
Programmable 8-bit or 9-bit data format
Separately enabled transmitter and receiver
Programmable polarity for transmitter and receiver
Programmable transmitter output parity
Two receiver wakeup methods:
— Idle line wakeup
— Address mark wakeup
Interrupt-driven operation with eight flags:
— Transmitter empty
— Transmission complete
— Receiver full
— Idle receiver input
— Receiver overrun
— Noise error
— Framing error
— Parity error
— Receive wakeup on active edge
— Transmit collision detect supporting LIN
— Break Detect supporting LIN
Receiver framing error detection
Hardware parity checking
1/16 bit-time noise detection
Run mode
Wait mode
Stop mode
Features
Modes of Operation
MC9S12XE-Family Reference Manual , Rev. 1.23
Freescale Semiconductor