LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 210

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 3 Memory Mapping Control (S12XMMCV4)
210
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
CPU and BDM
Local Memory Map
0x0000
0x0800
0x0C00
0x1000
0x2000
0x4000
0x8000
0xC000
0xFFFF
1K EEPROM window
16K FLASH window
2K REGISTERS
4K RAM window
Reset Vectors
1K EEPROM
16K FLASH
16K FLASH
Unpaged
Unpaged
8K RAM
Figure 3-17. Expansion of the Local Address Map
MC9S12XE-Family Reference Manual , Rev. 1.23
RPAGE
PPAGE
EPAGE
0x00_0000
0x00_0800
0x00_1000
0x0F_E000
0x10_0000
0x13_FC00
0x7F_4000
0x14_0000
0x40_0000
0x7F_8000
0x7F_C000
0x7F_FFFF
Global Memory Map
2K REGISTERS
253 *16K paged
(PPAGE 0xFD)
(PPAGE 0xFE)
(PPAGE 0xFF)
255*1K paged
1K EEPROM
253*4K paged
16K FLASH
16K FLASH
16K FLASH
8K RAM
EEPROM
External
2K RAM
FLASH
Space
RAM
Freescale Semiconductor

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