LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 285

Manufacturer Part Number

KIT STUDENT LEARNING S12 DG128

Manufacturer

Freescale Semiconductor

Architecture

Code Gen Tools Included

Code Warrior

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

HCS12 DG128 Learning Kit

Rohs Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

1. ENBDM is read as 1 by a debugging environment in special single chip mode when the device is not secured or secured but

2. CLKSW is read as 1 by a debugging environment in emulation modes when the device is not secured and read as 0 when

3. UNSEC is read as 1 by a debugging environment in special single chip mode when the device is secured and fully erased,

Freescale Semiconductor

Special Single-Chip Mode

Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers

fully erased (non-volatile memory). This is because the ENBDM bit is set by the standard ﬁrmware before a BDM command

can be fully transmitted and executed.

secured if emulation modes available.

else it is 0 and can only be read if not secure (see also bit description).

indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010

Emulation Modes

All Other Modes

(if modes available)

BDM Status Register (BDMSTS)

Figure 7-2. BDM Register Summary (continued)

Figure 7-3. BDM Status Register (BDMSTS)

MC9S12XE-Family Reference Manual Rev. 1.23

= Unimplemented, Reserved

= Always read zero

= Unimplemented, Reserved

= Indeterminate

Chapter 7 Background Debug Module (S12XBDMV2)

= Implemented (do not alter)

= Always read zero