LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 773

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
1. Data in SPIDRH is lost in this case.
2. SPIDRH can be read repeatedly without any effect on SPIF. SPIF Flag is cleared only by the read
1. Any write to SPIDRH or SPIDRL with SPTEF == 0 is effectively ignored.
2. Data in SPIDRH is undefined in this case.
3. SPIDRH can be written repeatedly without any effect on SPTEF. SPTEF Flag is cleared only by
XFRW Bit
XFRW Bit
of SPIDRL after reading SPISR with SPIF == 1.
writing to SPIDRL after reading SPISR with SPTEF == 1.
0
1
0
1
Read SPISR with SPTEF == 1 then
Read SPISR with SPTEF == 1
Read SPISR with SPIF == 1
Read SPISR with SPIF == 1
Table 21-10. SPTEF Interrupt Flag Clearing Sequence
Table 21-9. SPIF Interrupt Flag Clearing Sequence
MC9S12XE-Family Reference Manual Rev. 1.23
SPTEF Interrupt Flag Clearing Sequence
SPIF Interrupt Flag Clearing Sequence
then
then
then
Byte Write to SPIDRH
Byte Read SPIDRH
Word Write to (SPIDRH:SPIDRL)
Word Read (SPIDRH:SPIDRL)
Byte Write to SPIDRL
Byte Read SPIDRL
Write to SPIDRL
Chapter 21 Serial Peripheral Interface (S12SPIV5)
Read SPIDRL
1(3)
or
or
(2)
or
or
Byte Write to SPIDRL
Byte Read SPIDRL
(1)
1(2)
(1)
1
1
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