LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 429

KIT STUDENT LEARNING S12 DG128

LFEBS12UB

Manufacturer Part Number
LFEBS12UB
Description
KIT STUDENT LEARNING S12 DG128
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of LFEBS12UB

Architecture
8/16-bit
Code Gen Tools Included
Code Warrior
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12D
Kit Contents
HCS12 DG128 Learning Kit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CSEM
Operation
Unlocks a semaphore that was locked by the RISC core.
In monadic address mode, bits RS[2:0] select the semaphore to be cleared.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
CSEM #IMM3
CSEM RS
N
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Not affected.
Not affected.
Not affected.
Not affected.
Z
V
Source Form
C
MC9S12XE-Family Reference Manual Rev. 1.23
Address
Mode
IMM3
MON
Clear Semaphore
0
0
0
0
0
0
0
0
0
0
IMM3
Machine Code
RS
1
1
1
1
1
1
Chapter 10 XGATE (S12XGATEV3)
1
1
CSEM
0
0
0
0
0
0
0
1
Cycles
PA
PA
429

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