LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 128

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Read: Anytime.
1. Read: Always reads 0x00
1. Read: Always reads 0x00
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.26
2.3.27
2.3.28
128
Address 0x0245
Address 0x0246
Address 0x0247
Write: Anytime.
Write: Unimplemented
Write: Unimplemented
PPST
Field
Reset
Reset
Reset
7-0
W
W
W
R
R
R
Port T pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A pull-down device is connected to the associated pin, if enabled and if the pin is used as input.
0 A pull-up device is connected to the associated pin, if enabled and if the pin is used as input.
PPST7
Port T Polarity Select Register (PPST)
PIM Reserved Register
PIM Reserved Register
0
0
0
0
0
7
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
PPST6
0
0
0
0
0
6
6
6
Figure 2-24. Port T Polarity Select Register (PPST)
Table 2-25. PPST Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 2-25. PIM Reserved Register
Figure 2-26. PIM Reserved Register
PPST5
0
0
0
0
0
5
5
5
PPST4
0
0
0
0
0
4
4
4
Description
PPST3
3
0
3
0
0
3
0
0
PPST2
0
0
0
0
0
2
2
2
Access: User read/write
Freescale Semiconductor
PPST1
0
0
0
0
0
1
1
1
Access: User read
Access: User read
PPST0
0
0
0
0
0
0
0
0
(1)
(1)
(1)