LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 1003

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.4.2.14 Set Field Margin Level Command
The Set Field Margin Level command, valid in special modes only, causes the Memory Controller to set
the margin level specified for future read operations of a specific P-Flash or D-Flash block.
Upon clearing CCIF to launch the Set Field Margin Level command, the Memory Controller will set the
field margin level for the targeted block and then set the CCIF flag.
Valid margin level settings for the Set Field Margin Level command are defined in
Freescale Semiconductor
1. As defined by the memory map for FTM512K3.
FERSTAT
Register
FSTAT
User margin levels can be used to check that Flash memory contents have
adequate margin for normal level read operations. If unexpected results are
encountered when checking Flash memory contents at user margin levels, a
potential loss of information has been detected.
CCOBIX[2:0]
Table 26-60. Set Field Margin Level Command FCCOB Requirements
000
001
MGSTAT1
MGSTAT0
EPVIOLIF
ACCERR
Table 26-59. Set User Margin Level Command Error Handling
Error Bit
FPVIOL
(CCOBIX=001)
Table 26-61. Valid Set Field Margin Level Settings
0x0000
0x0001
CCOB
MC9S12XE-Family Reference Manual , Rev. 1.23
Set if CCOBIX[2:0] != 001 at command launch
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see
Set if an invalid global address [22:16] is supplied
Set if an invalid margin level setting is supplied
None
None
None
None
0x0E
NOTE
Return to Normal Level
User Margin-1 Level
FCCOB Parameters
Margin level setting
Level Description
Global address [22:16] to identify the Flash
Error Condition
Chapter 26 384 KByte Flash Module (S12XFTM384K2V1)
(1)
block
(1)
Table
26-30)
Table
26-61.
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