LFEBS12UB Freescale Semiconductor, LFEBS12UB Datasheet - Page 775

• Manufacturer Part Number: LFEBS12UB
• Description: KIT STUDENT LEARNING S12 DG128
• Manufacturer: Freescale Semiconductor

Specifications of LFEBS12UB

• Architecture: 8/16-bit
• Code Gen Tools Included: Code Warrior
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12D
• Kit Contents: HCS12 DG128 Learning Kit
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.4
The SPI module allows a duplex, synchronous, serial communication between the MCU and peripheral
devices. Software can poll the SPI status flags or SPI operation can be interrupt driven.
The SPI system is enabled by setting the SPI enable (SPE) bit in SPI control register 1. While SPE is set,
the four associated SPI port pins are dedicated to the SPI function as:
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
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Receive Shift Register
Receive Shift Register
Slave select (SS)
Serial clock (SCK)
Master out/slave in (MOSI)
Master in/slave out (MISO)
SPI Data Register
SPI Data Register
Functional Description
SPIF
SPIF
Data A Received
Data A Received
Figure 21-10. Reception with SPIF serviced too late
Figure 21-9. Reception with SPIF serviced in Time
= Unspecified
= Unspecified
MC9S12XE-Family Reference Manual Rev. 1.23
Data A
Data A
Data A
Data A
= Reception in progress
= Reception in progress
Data B Received
Data B Received
Data B
Data B
Chapter 21 Serial Peripheral Interface (S12SPIV5)
SPIF Serviced
Data B Lost
SPIF Serviced
Data B
Data C Received
Data C Received
Data C
Data C
Data C
Data C
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