ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 88

IC MCU 32BIT 64KB FLASH 64LQFP

ATSAM3S1BA-AU

Manufacturer Part Number
ATSAM3S1BA-AU
Description
IC MCU 32BIT 64KB FLASH 64LQFP
Manufacturer
Atmel
Series
SAM3Sr
Datasheets

Specifications of ATSAM3S1BA-AU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
47
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 10x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
47
Ram Memory Size
16KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S1BA-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATSAM3S1BA-AUR
Manufacturer:
Atmel
Quantity:
10 000
10.12.1
10.12.1.1
10.12.1.2
10.12.1.3
10.12.1.4
10.12.1.5
88
ADR
SAM3S Preliminary
ADR
Syntax
Operation
Restrictions
Condition flags
Examples
R1, TextMessage
Load PC-relative address.
where:
cond
Rd
label
ADR determines the address by adding an immediate value to the PC, and writes the result to
the destination register.
ADR produces position-independent code, because the address is PC-relative.
If you use ADR to generate a target address for a BX or BLX instruction, you must ensure that
bit[0] of the address you generate is set to1 for correct execution.
Values of label must be within the range of − 4095 to +4095 from the address in the PC.
You might have to use the .W suffix to get the maximum offset range or to generate addresses
that are not word-aligned. See
Rd must not be SP and must not be PC.
This instruction does not change the flags.
ADR{cond} Rd, label
is an optional condition code, see
is the destination register.
is a PC-relative expression. See
; Write address value of a location labelled as
; TextMessage to R1
“Instruction width selection” on page
“PC-relative expressions” on page
“Conditional execution” on page
86.
6500C–ATARM–8-Feb-11
84.
84.

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