ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 271

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

16.4
16.4.1
6500C–ATARM–8-Feb-11
Supply Controller Functional Description
Supply Controller Overview
The device can be divided into two power supply areas:
The Supply Controller (SUPC) controls the supply voltage of the core power supply. The SUPC
intervenes when the VDDIO power supply rises (when the system is starting) or when the
Backup Low Power Mode is entered.
The SUPC also integrates the Slow Clock generator which is based on a 32 kHz crystal oscilla-
tor and an embedded 32 kHz RC oscillator. The Slow Clock defaults to the RC oscillator, but the
software can enable the crystal oscillator and select it as the Slow Clock source.
The Supply Controller and the VDDIO power supply have a reset circuitry based on a zero-
power power-on reset cell. The zero-power power-on reset allows the SUPC to start properly as
soon as the VDDIO voltage becomes valid.
At startup of the system, once the voltage VDDIO is valid and the embedded 32 kHz RC oscilla-
tor is stabilized, the SUPC starts up the core by sequentially enabling the internal Voltage
Regulator, waiting that the core voltage VDDCORE is valid, then releasing the reset signal of the
core “vddcore_nreset” signal.
Once the system has started, the user can program a supply monitor and/or a brownout detec-
tor. If the supply monitor detects a voltage on VDDIO that is too low, the SUPC can assert the
reset signal of the core “vddcore_nreset” signal until VDDIO is valid. Likewise, if the brownout
detector detects a core voltage VDDCORE that is too low, the SUPC can assert the reset signal
“vddcore_nreset” until VDDCORE is valid.
When the Backup Low Power Mode is entered, the SUPC sequentially asserts the reset signal
of the core power supply “vddcore_nreset” and disables the voltage regulator, in order to supply
only the VDDIO power supply. In this mode the current consumption is reduced to a few micro-
amps for Backup part retention. Exit from this mode is possible on multiple wake-up sources
including an event on WKUP pins, or a Clock alarm. To exit this mode, the SUPC operates in the
same way as system startup.
• The VDDIO Power Supply: including the Supply Controller, a part of the Reset Controller, the
• The Core Power Supply: including the other part of the Reset Controller, the Brownout
Slow Clock switch, the General Purpose Backup Registers, the Supply Monitor and the Clock
which includes the Real Time Timer and the Real Time Clock
Detector, the Processor, the SRAM memory, the FLASH memory and the Peripherals
SAM3S Preliminary
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