ATSAM3S1BA-AU Atmel, ATSAM3S1BA-AU Datasheet - Page 66

• Manufacturer Part Number: ATSAM3S1BA-AU
• Description: IC MCU 32BIT 64KB FLASH 64LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S1BA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 10x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 47
• Ram Memory Size: 16KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.6.3
10.6.3.1
10.6.3.2
10.6.3.3
10.6.4
66
SAM3S Preliminary
Exception handlers
Vector table
Interrupt Service Routines (ISRs)
Fault handlers
System handlers
For more information about hard faults, memory management faults, bus faults, and usage
faults, see
The processor handles exceptions using:
Interrupts IRQ0 to IRQ34 are the exceptions handled by ISRs.
Hard fault, memory management fault, usage fault, bus fault are fault exceptions handled by the
fault handlers.
NMI, PendSV, SVCall SysTick, and the fault exceptions are all system exceptions that are han-
dled by system handlers.
The vector table contains the reset value of the stack pointer, and the start addresses, also
called exception vectors, for all exception handlers.
the exception vectors in the vector table. The least-significant bit of each vector must be 1, indi-
cating that the exception handler is Thumb code.
•
“Interrupt Clear-enable Registers” on page
“Fault handling” on page
70.
154.
Figure 10-3 on page 67
shows the order of
6500C–ATARM–8-Feb-11